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MIC5841/5842
Micrel
MIC5841/5842
8-Bit Serial-Input Latched Drivers
General Description
Using BiCMOS technology, the MIC5841/5842 integrated circuits were fabricated to be used in a wide variety of peripheral power driver applications. The devices each have an eight-bit CMOS shift register, CMOS control circuitry, eight CMOS data latches, and eight bipolar current-sink Darlington output drivers. These two devices differ only in maximum voltage ratings. The MIC5842 offers premium performance with a minimum output breakdown voltage rating of 80V (50V sustaining). The drivers can be operated with a split supply where the negative supply is down to -20V. The 500 mA outputs, with integral transient-suppression diodes, are suitable for use with lamps, relays, solenoids and other inductive loads. These devices have improved speed characteristics. With a 5V logic supply, they will typically operate faster than 5 MHz. With a 12V supply, significantly higher speeds are obtained. The CMOS inputs are compatible with standard CMOS, PMOS, and NMOS logic levels. TTL or DTL circuits may require the use of appropriate pull-up resistors. By using the serial data output, the drivers can be cascaded for interface applications requiring additional drive lines. The MIC5840 family is available in DIP, PLCC, and SOIC packages. Because of limitations on package power dissipation, the simultaneous operation of all drivers at maximum rated current might require a reduction in duty cycle. A copper-alloy lead frame provides for maximum package power dissipation.
Features
* * * * * * * 3.3 MHz Minimum Data-Input Rate CMOS, PMOS, NMOS, TTL Compatible Internal Pull-Up/Pull-Down Resistors Low-Power CMOS Logic and Latches High-Voltage Current-Sink Outputs Output Transient-Protection Diodes Single or Split Supply Operation
Ordering Information
Part Number MIC5841BN MIC5841BV MIC5841BWM MIC5842BN MIC5842BV MIC5842BWM Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C Package 18-Pin Plastic DIP 20-Pin PLCC 18-Pin Wide SOIC 18-Pin Plastic DIP 20-Pin PLCC 18-Pin Wide SOIC
Functional Diagram
CLK
1
Pin Configuration
SERIAL DATA IN
6 8-BIT SERIAL-PARALLEL SHIFT REGISTER 3 5
SERIAL DATA OUT VDD
VEE CLOCK
1
SUB
18 C 17
OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 K
2
4
LATCHES 7
STROBE
VSS VDD
4 VSS 5 VDD
LATCHES
VSS
SHIFT REGISTER
SERIAL DATA IN 3
16 15 14 13 12 11 10
8 MOS Bipolar
OUTPUT ENABLE (ACTIVE LOW)
SERIAL DATA OUT 6 STROBE 7 ST 8 OE 9
SUB
Sub 1 9
OUTPUT ENABLE VEE
VEE
10
18
17
16
15
14
13
12
11
K
OUT1
OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8
(DIP, SOIC)
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October 1998
MIC5841/5842
SERIAL DATA IN
Micrel
Pin Configuration
(20-Pin PLCC)Top View.
Absolute Maximum Ratings (Note 1, 2, 3)
CLOCK
at 25C Free-Air Temperature and VSS = 0V
OUT 1 OUT 2 VEE
3
2
1
20
19 18 17
NC VSS VDD SERIAL DATA OUT NC
4 5 6 7 8 9 10 11 12 13
OUT 3 OUT 4 OUT 5 OUT 6 OUT 7
MIC5842BV
16 15 14
Output Voltage, VCE (MIC5841) 50V (MIC5842) 80V Output Voltage, VCE(SUS) (MIC5841) (Note 1) 35V (MIC5842) 50V Logic Supply Voltage, VDD 15V VDD with Reference to VEE 25V Emitter Supply Voltage, VEE -20V Input Voltage Range, VIN -0.3V to VDD + 0.3V Continuous Output Current, IOUT 500mA Package Power Dissipation, PD (Note 2) 1.82W Operating Temperature Range, TA -55C to +85C Storage Temperature Range, TS -65C to +150C
Note 1: For Inductive load applications. Note 2: Derate at the rate of 18.2mW/C above TA = 25C (Plastic DIP) Note 3: CMOS devices have input-static protection but are susceptible to damage when exposed to extremely high static electrical charges.
OUTPUT EN
STROBE
K
Electrical Characteristics at TA = 25C VDD = 5V, VSS = VEE = 0V (unless otherwise noted)
Applicable Characteristic Output Leakage Current Symbol ICEX Devices MIC5841 MIC5842 Collector-Emitter Saturation Voltage Collector-Emitter Sustaining Voltage Input Voltage VCE(SUS) (Note 5) VIN(0) VIN(1) MIC5841 MIC5842 Both Both VDD = 12V VDD = 10V VDD = 5.0V (See Note 4) Input Resistance RIN Both VDD = 12V VDD = 10V VDD = 5.0V Supply Current IDD(ON) Both All Drivers ON, VDD = 12V All Drivers ON, VDD = 10V All Drivers ON, VDD = 5.0V IDD(OFF) Both All Drivers OFF, VDD = 12V All Drivers OFF, VDD = 10V All Drivers OFF, VDD = 5.0V Clamp Diode Leakage Current Clamp Diode Forward Voltage VF IR MIC5841 MIC5842 Both VR = 50V VR = 80V IF = 350mA 10.5 8.5 3.5 50 50 50 16 14 8.0 2.9 2.5 1.6 50 50 2.0 V A mA k VCE(SAT) Both Test Conditions VOUT = 50V VOUT = 50V, TA = +70C VOUT = 80V VOUT = 80V, TA = +70C IOUT = 100mA IOUT = 200mA IOUT = 350mA, VDD = 7.0V IOUT = 350mA, L = 2mH IOUT = 350mA, L = 2mH 35 50 0.8 V Min. Limits Max. 50 100 50 100 1.1 1.3 1.6 V V Unit A
OUT 8
VEE
7
Note 4: Operation of these devices with standard TTL may require the use of appropriate pull-up resistors to insure an input logic HIGH. Note 5: Not 100% tested. Guaranteed by design. October 1998 7-43
MIC5841/5842
Micrel
Electrical Characteristics TA = -55C, VDD = 5V, VSS = VEE = 0V (unless otherwise noted)
Limits Characteristic Output Leakage Current Collector-Emitter Saturation Voltage Input Voltage VIN(0) VIN(1) Input Resistance RIN VDD = 12V VDD = 5.0V VDD = 12V VDD = 10V VDD = 5.0V Supply Current IDD(ON) All Drivers ON, VDD = 12V All Drivers ON, VDD = 10V All Drivers ON, VDD = 5.0V IDD(OFF) All Drivers OFF, VDD = 12V All Drivers OFF, VDD = 5.0V 10.5 3.5 35 35 35 16 14 10 3.5 2.0 mA k Symbol ICEX VCE(SAT) Test Conditions VOUT = 80V IOUT = 100mA IOUT = 200mA IOUT = 350mA, VDD = 7.0V Min. Max. 50 1.3 1.5 1.8 0.8 V Unit A V
Electrical Characteristics TA = +125C, VDD = 5V, VSS = VEE = 0V (unless otherwise noted)
Limits Characteristic Output Leakage Current Collector-Emitter Saturation Voltage Input Voltage VIN(0) VIN(1) Input Resistance RIN VDD = 12V VDD = 5.0V VDD = 12V VDD = 10V VDD = 5.0V Supply Current IDD(ON) All Drivers ON, VDD = 12V All Drivers ON, VDD = 10V All Drivers ON, VDD = 5.0V IDD(OFF) Clamp Diode Leakage Current IR MIC5841A MIC5842A All Drivers OFF, VDD = 12V All Drivers OFF, VDD = 5.0V VR = 50V VR = 80V 10.5 3.5 50 50 50 16 14 8 2.9 1.6 100 100 A mA k Symbol ICEX VCE(SAT) Test Conditions VOUT = 80V IOUT = 100mA IOUT = 200mA IOUT = 350mA, VDD = 7.0V Min. Max. 500 1.3 1.5 1.8 0.8 V Unit A V
7-44
October 1998
MIC5841/5842
CLOCK A B DATA IN E STROBE C F D
Micrel
OUTPUT ENABLE G OUT N
Timing Conditions
(TA = 25C Logic Levels are VDD and VSS) A. B. C. D. E. F. G. VDD = 5V Minimum Data Active Time Before Clock Pulse (Data Set-Up Time) ........................................................................ 75 ns Minimum Data Active Time After Clock Pulse (Data Hold Time) .............................................................................. 75 ns Minimum Data Pulse Width ..................................................................................................................................... 150 ns Minimum Clock Pulse Width .................................................................................................................................... 150 ns Minimum Time Between Clock Activation and Strobe ............................................................................................. 300 ns Minimum Strobe Pulse Width ................................................................................................................................... 100 ns Typical Time Between Strobe Activation and Output Transition ............................................................................. 500 ns
SERIAL DATA present at the input is transferred to the shift register on the logic "0" to logic "1" transition of the CLOCK input pulse. On succeeding CLOCK pulses, the registers shift data information towards the SERIAL DATA OUTPUT. The SERIAL DATA must appear at the input prior to the rising edge of the CLOCK input waveform. Information present at any register is transferred to its respective latch when the STROBE is high (serial-to-parallel conversion). The latches will continue to accept new data as long as the STROBE is held high. Applications where the latches are bypassed (STROBE tied high) will require that the ENABLE input be high during serial data entry. When the ENABLE input is high, all of the output buffers are disabled (OFF) without affecting information stored in the latches or shift register. With the ENABLE input low, the outputs are controlled by the state of the latches.
7
MIC5840 Family Truth Table
Serial Data Input H L X Shift Register Contents Clock Input I1 H L R1 X P1
L = Low Logic Level H = High Logic Level X = Irrelevant P = Present State R = Previous State
I2 R1 R1 R2 X P2
I3
......
I8
Serial Data Strobe Output Input R7 R7 R8 X P8 L H
Latch Contents I1 I2 I3 ...... I8 Output Enable I1
Output Contents I2 I3 ...... I8
R2 ...... R7 R2 ...... R7 R3 ...... R8 X ...... X P3 ...... P8
R1 P1 X
R2 P2 X
R3 ...... R8 P3 ...... P8 X ...... X L H P1 H P2 H P3 ...... P8 H ...... H
October 1998
7-45
MIC5841/5842
Micrel
K
Typical Output Driver
OUT N
7.2K
3K
VEE
SUB
Typical Input Circuits
V DD
V DD
STROBE OUTPUT ENABLE
CLOCK SERIAL DATA IN
V SS
V SS
Maximum Allowable Duty Cycle (Plastic DIP)
VDD = 5.0V
Number of Outputs ON (IOUT = 200mA VDD = 5.0V) 8 7 6 5 4 3 2 1 25C 85% 97% 100% 100% 100% 100% 100% 100% Max. Allowable Duty Cycle at Ambient Temperature of 40C 72% 82% 96% 100% 100% 100% 100% 100% 50C 64% 73% 85% 100% 100% 100% 100% 100% 60C 55% 63% 73% 88% 100% 100% 100% 100% 70C 46% 53% 62% 75% 93% 100% 100% 100%
VDD = 12V
Number of Outputs ON (IOUT = 200mA VDD = 12V) 8 7 6 5 4 3 2 1
Max. Allowable Duty Cycle at Ambient Temperature of 25C 80% 91% 100% 100% 100% 100% 100% 100% 40C 68% 77% 90% 100% 100% 100% 100% 100% 50C 60% 68% 79% 95% 100% 100% 100% 100% 60C 52% 59% 69% 82% 100% 100% 100% 100% 70C 44% 50% 58% 69% 86% 100% 100% 100%
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October 1998
MIC5841/5842
Micrel
Typical Applications
Relay/Solenoid Driver MIC5842
+5V
MIC5841 Hammer Driver
+28V 22 +
+5V -15V 1
SUB
+30V 18 C
SHIFT REGISTER
1
SUB
18 17 SHIFT REGISTER 16 LATCHES 15 14 13 12 11 10
SUB
CLOCK DATA IN
2 3
17 16
LATCHES
CLOCK SERIAL DATA IN
2 3 4 VSS 5 V DD 6 0.1 7 ST 8 OE 9
4 VSS 5 V DD DATA OUT STROBE OUTPUT ENABLE (ACTIVE LOW) 6 7 ST 8 OE 9
SUB
15 14 13 12 11 10
28V
-15V
MIC5841 Solenoid Driver with Output Enable
MIC5841 Level Shifting Lamp Driver with Darlington Emitters Tied to a Negative Supply
7
SERIAL DATA CLOCK
+5V 22
+12V +
-9V
1
SUB
18 17 SHIFT REGISTER 16 LATCHES 15
+5V
1
SUB
18 17 SHIFT REGISTER 16 LATCHES 15 14 13 12 11 10
SUB
CLOCK SERIAL DATA IN ENABLE 0.1
2 3 4 VSS 5 V DD 6 7 ST 8 OE 9
SUB
2C 3 4V SS 5 VDD 6 7 ST 0.1 8 OE 9
14 13 12 11 10
Solenoids: Guardian Electric LT4X7-C-12V
+ 100
October 1998
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MIC5841/5842
Micrel
Typical Applications, Continued
MIC5842 Negative/Positive Supply PIN Diode Driver Transmit/Receive Switch
CLOCK +75V DATA IN STROBE 15 1
SUB
10k 18 1000p 17 +75V RFC D1 Antenna Transmitter
2C
SHIFT REGISTER
3 4V SS +5V 0.01 5 VDD 6 7 ST 8 OE 100 9 + 0.01
SUB
16
LATCHES
15 25 14 1000p 13 12 25 11 1000p 10 +75V 0.01 Diode D2 (Latch 5) ACTIVE OFF
10k D2 RFC RFC +75V 10k Receiver RFC D3
-5V
D1 (Latch 1) Receive OFF Transmit ACTIVE
D3 (Latch 8) OFF ACTIVE
PIN Diodes: UM9651
7-48
October 1998

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